The present invention relates to a semiconductor device provided with a built-in minute charge detecting circuit.
Conventionally, there has been a semiconductor device provided with a built-in minute charge detecting circuit for detecting a minute electric charge. When inspecting this semiconductor device, a minute charge generating circuit that serves as an input signal source is arranged near an input terminal of the semiconductor device so as to make an input signal less susceptible to influence of stray capacitance, external noises and the like. An output signal of the minute charge detecting circuit is measured with a minute electric charge given as a signal directly to the input terminal so as to measure the gain, the signal-to-noise ratio or the like of the minute charge detecting circuit.
FIG. 7 shows a semiconductor device 40 with the built-in minute charge detecting circuit and a minute charge generating circuit 50 for inspecting the semiconductor device. As shown in FIG. 7, this semiconductor device has a differential amplifier OP, a charge detecting capacitance C1, a charge-discharging witch SW1 and a processing circuit 44. An inverted input terminal of the differential amplifier OP is connected to an input terminal 41 and a non-inverted input terminal of the differential amplifier OP is connected to a ground GND. The charge detecting capacitance C1 is connected across an output terminal of the differential amplifier OP and the inverted input terminal of the differential amplifier OP. The charge-discharging switch SW1 is connected across the output terminal the differential amplifier OP and the inverted input terminal of the differential amplifier OP. The processing circuit 44 processes an output voltage outputted from the differential amplifier OP. The differential amplifier OP, the charge detecting capacitance C1 and the charge-discharging switch SW1 constitute a minute charge detecting circuit 43.
The semiconductor device 40 shown in FIG. 7 is inspected by inputting an electric charge generated in the minute charge generating circuit 50 to the input terminal 41 of the semiconductor device 40. An electric charge Q accumulated when a voltage V is applied to the capacitance C is expressed by:
Q=Cxc3x97V.
Therefore, assuming that an electric charge accumulated in the charge detecting capacitance C1 of the minute charge detecting circuit 43 is Q1, then an output voltage Vo becomes:
Vo=Q1/C1,
and the output voltage Vo of the minute charge detecting circuit 43 is inversely proportional to the charge detecting capacitance C1. Therefore, unless the capacitance value of the charge detecting capacitance C1 is reduced, the output voltage Vo becomes a minute voltage since the electric charge Q1 is a minute charge. As a result, the measurement error increases. For the above reasons, the charge detecting capacitance C1 of the minute charge detecting circuit 43 is required to have a minute capacitance value of about several picofarads.
Accordingly, when inspecting the minute charge detecting circuit 43, a stray capacitance added to the input terminal 41 emerges as a disadvantage. Specifically, if an input stray capacitance Cf is added by connecting an input section of the minute charge generating circuit 43 to the input terminal 41 as shown in FIG. 7, then a charge quantity Qf out of the minute charge quantity Q given from the minute charge generating circuit 50 is accumulated in the input stray capacitance Cf. As a consequence, the charge quantity Q1 accumulated in the minute charge detecting capacitance C1 becomes a difference between the input charge quantity Q and the electric charge Qf accumulated in the stray capacitance as expressed by:
Q1=Qxe2x88x92Qf.
Since the accumulated electric charge Qf increases when the stray capacitance Cf is increased, the electric charge Q1 becomes significantly reduced from the input charge quantity Q. Therefore, the stray capacitance Cf becomes a factor of a reduction in measurement accuracy.
When inspecting the semiconductor device shown in FIG. 7, it cannot be avoided that the stray capacitance Cf due to wiring is added to the input section of the minute charge detecting circuit 43 even if the minute charge generating circuit 50 is arranged near the minute charge detecting circuit 43 to be measured. Furthermore, in order to connect the minute charge detecting circuit 43 to be measured to the minute charge generating circuit 50 that generates an input signal, it is required to provide a connection by means of a socket or probing. Due to addition of the stray capacitance in the connection, the stray capacitance Cf increases to the extent of several picofarads. For the above reason, the accumulated electric charge Qf increases, which decreases the electric charge Q1 accumulated in the charge detecting capacitance C1 of the minute charge detecting circuit 43. Thereby, there has caused a disadvantage that a measurement error of gain is increased. In order to avoid this disadvantage, it is required to provide a setting of:
Cf less than  less than C1.
However, the charge detecting capacitance C1 cannot be increased in the semiconductor device in which the capacitance value of the charge detecting capacitance C1 amounts to several picofarads in order to obtain a sufficient output voltage. Therefore, the measurement accuracy cannot be increased.
Moreover, when a minute electric charge is inputted as an input signal directly to the input terminal, an impedance of the input wiring portion is high with a high impedance of the input terminal and a high impedance of the input minute electric charge. The above state is susceptible to the influence of external noises, which leads to a disadvantage that the measurement becomes unstable.
An object of the present invention is to provide a semiconductor device capable of improving accuracy in measurement of a minute charge detecting circuit by suppressing influence of stray capacitance, external noises and the like during test.
In order to achieve the aforementioned object, the present invention provides a semiconductor device a semiconductor device comprising: a minute charge detecting circuit for detecting a minute electric charge; and a test circuit provided between an input terminal of the semiconductor device and an input section of the minute charge detecting circuit, the test circuit having: a charge transforming capacitance for transforming a voltage signal inputted from the input terminal into an electric charge, and an operation mode switchover means for switching over between a normal operation mode in which an electric charge inputted to the input terminal is detected by the minute charge detecting circuit and a test operation mode in which the voltage signal inputted to the input terminal is transformed into an electric charge by the charge transforming capacitance and the transformed electric charge is detected by the minute charge detecting circuit.
According to the semiconductor device having the above-mentioned construction, the charge transforming capacitance (capacitor) and the operation mode switchover means are provided between the input section of the minute charge detecting circuit and the input terminal of the semiconductor device, and the charge transforming capacitance eliminates the harmful influence of stray capacitance and external noises added to the input terminal.
Specifically, even if stray capacitance attributed to wiring from an input signal source to the input terminal or stray capacitance due to contact of a socket or a probe is added, a high voltage can be applied as a test signal to the input terminal because of the charge transforming capacitance. Consequently, the electric charge accumulated in the charge detecting capacitance in the minute charge detecting circuit is not reduced by the harmful influence of the stray capacitance, and therefore the gain of the minute charge detecting circuit can be accurately measured.
Moreover, the voltage signal from the input signal source of low output impedance can be used as an input signal, and therefore the impedance of the input signal line can be reduced. This arrangement is less susceptible to the influence of the external noises and allows the measurement value to be stabilized.
Furthermore, the minute charge generating circuit, which requires careful handling due to a signal of a minute electric charge, is built in the semiconductor device, and therefore an external inspection circuit is allowed to have a simple construction.
In one embodiment of the present invention, the operation mode switchover means comprises: a first switch that has one terminal connected to the input terminal and other terminal connected to the input section of the minute charge detecting circuit; and a second switch that has one terminal connected to the charge transforming capacitance and other terminal connected to the input section of the minute charge detecting circuit.
According to the semiconductor of the above-mentioned embodiment, the operation mode switchover means has the first and second switches to easily switch over between the normal operation mode and the test operation mode. In the test operation mode of turning off the first switch and turning on the second switch, the voltage signal inputted to the input terminal is transformed into an electric charge by the charge transforming capacitance, so that the transformed electric charge is detected by the minute charge detecting circuit.
In the semiconductor device of one embodiment, the operation mode switchover means comprises: a first switch that has one terminal connected to the input terminal and other terminal connected to the input section of the minute charge detecting circuit; and a second switch that has one terminal connected to the input terminal and other terminal connected to the charge transforming capacitance.
This embodiment has the same operational advantage as that of the previous embodiment.
In one embodiment of the present invention, the operation mode switchover means comprises: a first switch that has one terminal connected to the input terminal and other terminal connected to the input section of the minute charge detecting circuit; a second switch that has one terminal connected to the input terminal and other terminal connected to the charge transforming capacitance; and a third switch that has one terminal connected to the charge transforming capacitance and other terminal connected to the input section of the minute charge detecting circuit.
According to the semiconductor device of the above-mentioned embodiment, when turning off the first switch and turning on the second and third switches, the voltage signal inputted to the input terminal is transformed into an electric charge by the charge transforming capacitance. The transformed electric charge is detected by the minute charge detecting circuit. Furthermore, input of unnecessary signals are prevented by selectively turning on the second switch under a state that the first switch is turned off and the third switch is turned on only when the voltage signal for test is applied to the input terminal.
In one embodiment of the present invention, the second switch is turned on during a period when an electric charge for test use is given to the minute charge detecting circuit and the second switch is turned off during a period when no electric charge for test use is given to the minute charge detecting circuit in a state that the first and third switches are turned on in the test operation mode.
According to the semiconductor device of the above-mentioned embodiment, the second switch is turned on during the period under the state that the first and third switches are turned on when the electric charge for test use is given to the minute charge detecting circuit. In contrast, the second switch is turned off during the period when the electric charge for test use is not given to the minute charge detecting circuit. The above operation enables removal of the noises of the voltage signal during inspection.